Thursday, 10 May 2012

T 443/11 – Irrelevant matter

This is an appeal against the refusal of an application by the Examining Division (ED). The reason given for the refusal was that the application did not meet the requirements of A 83 and R 42(1)(e).

The single claim before the Board read:
A turbo encoder comprising:
a first encoder (111) for encoding a frame of K input information bits to generate first coded symbols;
an interleaver for
sequentially writing the K input information bits into an R x C rectangular matrix row by row starting in the first column of the first row,
selecting a primitive root g0 corresponding to a prime number p,
generating a base sequence C(i) for intra-row permutation as
C(i) = [g0xC(i-1)] mod p, i = 1, 2, ... , (p-2) and C(0) = 1,
determining a minimum prime integer set {qj} for j = 0, 1, 2, ... ,R-1 such that
g.c.d {qj,p-1} = 1 and qj > 6, qj > q(j-1) for each j = 1, 2, ...,R-1,
where g.c.d is a greatest common divider and q0 = 1,
determining {pj} from {qj} using
pP(j) = qj, j = 0, 1, ... , R-1
where P(j) indicates a predetermined inter-row permutation pattern,
permuting positions of the information bits in a jth row in accordance with
Cj(i) = C([ixpj] mod (p-1)),
where j = 0, 1, 2, ... , (R-1), i = 0, 1, 2, ... , (p-2), Cj(p-1) = 0, and Cj(p) = p;
performing inter-row permutations according to the predetermined inter-row permutation pattern P(j), and
reading out the information bits from the permuted R x C rectangular matrix column by column starting in the first row of the first column; and
a second encoder (113) for encoding the interleaved information bits to generate second coded symbols,
wherein the R x C rectangular matrix has R rows and C columns, K specifies the number of the input information bits in the frame and K = R x C, C=p+1 and K>R>1;
characterized in that
the prime number p is the minimum prime number satisfying 0 <= (p+1)-K/R; and
the interleaver is arranged to implement, between the permuting of the positions of the information bits and the performing inter-row permutations, one of the following:
exchanging CR-1(p) with CR-1(0),
exchanging CR-1(p) with CR-1(p-1),
exchanging Cj(p) with Cj(0) for every j, wherein j = 0, 1, 2, ... R-1,
exchanging Cj(p) with Cj(p-1) for every j, wherein j = 0, 1, 2, ... R-1,
exchanging Cj(p) with Cj(k) for every j, wherein j = 0, 1, 2, ... R-1 and wherein k indicates a specific exchanging position searched for a given interleaving rule, or
exchanging CR-1(p) with CR-1(k), wherein k indicates a specific exchanging position searched for a given interleaving rule.
The Board found most of the arguments of the ED to be unpersuasive:

Sufficiency of disclosure (A 83 and R 42(1)(e))

[3.1] The objection in the decision under appeal concerning sufficiency of disclosure is based on the argumentation in decision T 1123/09  relating to claim interpretation. The board considers that this argumentation is not applicable to the present case, because of differences in the wording of the claims.

Specifically, claim 1 as addressed in T 1123/09 defines that the “inter-column permutation” step is performed by the interleavers, whereas the step of “collecting the permutated bits” is performed by a different component, namely the modulator, thus clearly indicating that these two steps are separate operations which are not combined.

In contrast, the present claim defines that both of the corresponding steps (permutation and reading out) are performed by the interleaver, so that the option of these two steps being combined in one operation is not excluded. Thus the claim covers the embodiments described in the application with reference to figures 9 and 10, in which the inter-row permutation is combined with the reading out step by reading out using interleaved addresses.

[3.2] In the light of this interpretation of the claim, the board sees no inconsistency between the claim and the teaching of the application in paragraphs [0025] and [0026] relating to figures 2 and 3, which concerns an interleaver and a deinterleaver in which the write or read operation is combined with a permutation operation by using interleaved write or read addresses.

[3.3] Thus, considering the application as a whole, the board concludes that, as indicated in paragraph [0024], the teaching relating to figures 2 and 3 should be understood as explaining techniques for carrying out the permutation operations in combination with the write or read steps which can be used in the claimed invention, thus providing teaching in this respect which meets the general requirement of A 83. Considering the embodiments described in detail in the application, in particular with reference to figures 9 and 10, the board concludes that these are consistent with the claim, since the claim covers the performing of the inter-row permutation and reading out in a combined operation.

Thus, the application describes in detail at least one way of carrying out the invention, as required by R 42(1)(e).

[3.4] The board notes also in this context that during the course of the proceedings the ED has argued […] that claim 1 has to be taken literally. The board disagrees with this statement, since it is established case law of the boards of appeal that claims should be interpreted in the manner that they would be understood by a person skilled in the art.

In the present context the board considers that the skilled person would understand the definition of the interleaver in the present claim as specifying that the interleaver should operate so as to arrive at the result which would be produced by applying the defined mathematical operations, without requiring that it actually explicitly carries out each of these operations as a distinct process step.

Such an interpretation is consistent with the conventional manner in which mathematical operations are implemented in electronic devices, according to which a device is implemented in such a manner as to produce the result of the required mathematical operation by whatever method is appropriate for the particular hardware and/or software used, without placing any other restrictions on the actual operations carried out.

Thus, a literal interpretation of the present claim in this respect is not appropriate.

Clarity and irrelevant matter (A 84 and R 48(1)(c))

[4.1] In the summons to oral proceedings dated 23 April 2010 the ED raised objections under A 84 and R 48(1)(c). The board considers, for the following reasons, that the present claim meets those requirements.

[4.2] The division argued that the then valid claims lacked an essential feature, thus not clearly defining the invention, because they did not exclude the case that the selected primitive root g0 is 1. The board considers that the absence of an explicit exclusion of this value does not result in a loss of clarity, since it would be evident to the skilled person that this value of the primitive root was excluded, because if g0=1, then all of the C(i) would be equal to 1, so that C(i) would not be a permutation sequence. Since the claim requires C(i) to be a permutation sequence, the case that g0=1 is implicitly excluded, so that there is no lack of clarity in the claim.

[4.3] The division also argued that the application contained irrelevant matter, contrary to the requirement of R 48(1)(e). The reasons given for this objection were that the claims were restricted to the case where K=RxC, whereas paragraphs [0048] to [0050] covered other cases, and that paragraphs [0053] and [0054] taught that the invention differed from D1 only in “step B-5)”, i.e. the “exchanging” step of the present claim, thus implying that the invention also covered cases in which K was not equal to RxC.

The board does not find this argumentation convincing, for two reasons.

Firstly, the board considers that from the discussion of the prior art interleaver in paragraph [0049] it would be clear to the skilled person that, although the encoding technique as a whole might be applied to cases in which K is not equal to RxC, the invention is restricted to the case in which it does, since it is only in that case (i.e. that in which C=p+1) that the problem addressed by the invention arises.

Thus, the description of the other cases can be understood as being useful for the understanding of the technical background to the invention.

In particular, the board understands that the purpose of the defined step of generating the permutation sequences using the primitive root of a prime number derived from the frame size K is to cope with the fact that this parameter varies in a manner which cannot be predicted in advance. Hence, a discussion of how to proceed with different values of K seems to the board to be appropriate.

Secondly, the board does not understand paragraphs [0053] and [0054] as teaching that the invention differs from D1 only in the step B-5), but rather that it discloses merely that it is the introduction of this step which provides the solution to the problem.

The board is therefore not able to identify any matter in the application which could be considered to be irrelevant within the meaning of R 48(1)(e).

Should you wish to download the whole decision, just click here.

To have a look at the file wrapper, click here.

NB: A French summary can be found on Le blog du droit européen des brevets.


oliver said...

I should have added that, to my best knowledge, there is no R 48(1)(e). The correct reference is R 48(1)(c).